[Libre-soc-bugs] [Bug 737] in-order single-issue Power ISA 3.0 core

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Tue Nov 2 00:52:57 GMT 2021


https://bugs.libre-soc.org/show_bug.cgi?id=737

--- Comment #11 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #10)

> we could have the fetch pipe fetch ahead...execution could still always
> stall rather than speculating -- all that would happen is it will have
> fetched the correct target instead of always obliviously fetching the
> instructions immediately following the branch so a branch doesn't always
> require flushing the entire fetch pipe... that will speed the whole cpu up
> by probably 50%.

this is an optimistion, and it is scope-creep.

it is the absolute worst possible thing to do on a project that is
under time pressure to suggest optimisations, particularly when
no actual code even implementing the specified non-optimised design
does not even exist yet.

i have asked you multiple times to focus and not introduce distractions.

please stop recommending, raising, or discussing optimisations.

if there was no time pressure under contract it would be perfectly fine.

as we are under contract and under time pressure it is not fine
and never will be fine.

please listen and keep this bugreport focussed.

no more ideas that could jeapordise the contract: only action
and absolute focus on completion of the contract.

are we absolutely clear?

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