[Libre-soc-bugs] [Bug 656] add v3.0B BCD instructions to simulator

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=656

--- Comment #10 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://libre-soc.org/irclog/%23libre-soc.2021-07-28.log.html#t2021-07-28T19:18:02

dmitry: we have no idea how these instructions work. therefore, unit tests
can be written which bounce off of qemu, by way of comparison.

you can experiment with random values and/or fixed values, using
this as a base:
https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/simulator/test_sim.py;hb=HEAD

that code will co-simulate the instruction against both qemu
*and* the simulator ISACaller, extracting the full contents
of the register files *and* memory, performing a byte-level
comparison.

if the results are different, you know one of two things:

1) qemu is f*****d.
2) ISACaller is borked.

we have actually had (1) occur, it has actually produced the wrong
answers in certain circumstances.  if that happens, we will need
to investigate further.

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