[Libre-soc-bugs] [Bug 583] Implement simple VL for-loop in nMigen for TestIssuer

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=583

--- Comment #13 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Luke Kenneth Casson Leighton from comment #12)
> https://libre-soc.org/openpower/sv/sprs/
> 
> also a Record is needed for SVSTATE according to the bitfields in sprs page
> above.  SVStateRecord

commit 80fbef229a74420ab5708c32432938cedfbc5e0b (HEAD -> master, origin/master)
Author: Luke Kenneth Casson Leighton <lkcl at lkcl.net>
Date:   Thu Jan 28 15:53:50 2021 +0000

    add SVState SPR Record, SVSTATERec

done.  Cesar basically i am putting "pieces" in place.  joining them
together once the pieces are there is then much easier.

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