[Libre-soc-bugs] [Bug 583] Implement simple VL for-loop in nMigen for TestIssuer

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=583

--- Comment #10 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
excellent.  this is crxor.  see how sv_cr_in = [1,2] and sv_cr_out = 0
this is decoded from EXTRA0=d:BT, EXTRA1=s:BA, EXTRA2=s:BB


OrderedDict([('opcode', '0b0011000001'), ('unit', 'CR'), ('internal op',
'OP_CROP'), ('in1', 'NONE'), ('in2', 'NONE'), ('in3', 'NONE'), ('out', 'NONE'),
('CR in', 'BA_BB'), ('CR out', 'BT'), ('inv A', '0'), ('inv out', '0'), ('cry
in', 'ZERO'), ('cry out', '0'), ('ldst len', 'NONE'), ('BR', '0'), ('sgn ext',
'0'), ('upd', '0'), ('rsrv', '0'), ('32b', '0'), ('sgn', '0'), ('rc', 'NONE'),
('lk', '0'), ('sgl pipe', '0'), ('comment', 'crxor'), ('form', 'XL'),
('EXTRA0', 'd:BT'), ('EXTRA1', 's:BA'), ('EXTRA2', 's:BB'), ('EXTRA3', '0'),
('SV_Ptype', '1P'), ('SV_Etype', 'EXTRA3'), ('sv_in1', None), ('sv_in2', None),
('sv_in3', None), ('sv_out', None), ('sv_cr_in', (1, 2)), ('sv_cr_out', 0)])

commit af95c57b2027a2e5effa56f7ce324fd696216de4 (HEAD -> master)
Author: Luke Kenneth Casson Leighton <lkcl at lkcl.net>
Date:   Wed Jan 27 18:38:34 2021 +0000

    add svp64 CR field identification for EXTRA2/3 decoding

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