[Libre-soc-bugs] [Bug 558] gcc SV intrinsics concept

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=558

--- Comment #49 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #48)
> If we want something we can just throw away later, what about writing the
> bare minimum to support vectors in inline assembly with register allocation
> and just write a C++ class that wraps inline assembly?

yyyeahhh i like it. it's not exactly what i had in mind for this bugreport,
however i can see it has value above trying to write in bare .S files.

we still need something that is a half-way house (like the RVV intrinsic
patch): not bare metal assembler, not full autovectorised gcc either.

> With inlining, it
> should be quite efficient. I could write the C++ class in a few days of work.
> 
> This would require compiling code that uses SV in C++ mode, which shouldn't
> be that difficult to achieve.

... it has some subtle implications.  c code compiled with g++ fails when -1 is
placed into a uint, rather than just going, "oh you must have meant 0xffffffff
i'll just take care of that for you".

have to ask Lauri if he's ok with it.

i can see it still being valuable though.

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