[Libre-soc-bugs] [Bug 583] Implement simple VL for-loop in nMigen for TestIssuer

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=583

--- Comment #30 from Cesar Strauss <cestrauss at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #28)
> you'll need this:
> 
> commit f67cd9f81a517e3b6e75c58bdc1d0d836fae26b7 (HEAD -> master)
> Author: Luke Kenneth Casson Leighton <lkcl at lkcl.net>
> Date:   Fri Feb 12 15:23:05 2021 +0000
> 
>     add SVSTATE to TestCase infrastructure for use in TestIssuer
> 
> and this (not tested):
> 
> commit 99c712d52e4a9ff932162118677f228a332f1c01 (HEAD -> master)
> Author: Luke Kenneth Casson Leighton <lkcl at lkcl.net>
> Date:   Fri Feb 12 15:23:44 2021 +0000
> 
>     add one SVP64 ALU test case to get started

Please push these changes, thanks.

Great progress on the simulator. It will be invaluable when testing the next
steps.

The SVP64 prefix fetch and decode is already working locally. I'll just need to
test it a little more, add some comments, polish, etc, before pushing.

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