[Libre-soc-bugs] [Bug 550] binutils support needed for svp64

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=550

--- Comment #50 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to dmitry.selyutin from comment #48)
> lkcl: I cannot map the branches spec[0] to "encmodes" (as per svp64.py
> argot). I got that we have SNZ, ALL and ~ALL as encmodes (the last one is
> also omitted from svp64.py).

yes because by default it is non-all ("some") therefore having ~ALL is a
waste of space.

> Luke, could you, please, a) help me to read the spec so that I have a clear
> vision how it maps into encmodes, or b) give an exhaustive list of things I
> need to consider as encmodes along with flags to be set, or c) update
> svp64.py respectively?

honestly i don't have time (NGI POINTER contract) and would appreciate if
you could do it.

the table *is* the table, which is "Format and fields".

each bit to be set requires a corresponding assembler slash-mnemonic
(in lower-case), the only exceptions being:

* /ctr obviously sets bit 19, and /cti sets bit 6.
  but having /ctr/cti is a total waste of space.  therefore, logically,
  /cti should set bit 19 *AND* bit 6

* similarly for sz and snz.  if you specify /snz then it *implies* /sz
  and so *both* bit 5 and 23 must be set when /snz is specified.

please do make something up for bits 20, 21 and 7, along the same lines:
make it "compact", logical, and keep to a maximum of 3 letters per
mnemonic.  vs for "VLSET mode" (bit 20) but "vsb" for *BOTH* bit 20 *AND*
bit 7.  vi and vib likewise involve bit 21 as well.

just... make it up as you go along, keeping it as compact as possible.
some instructions can easily already be well over 25 characters, which
is of some concern.

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