[Libre-soc-bugs] [Bug 737] in-order single-issue Power ISA 3.0 core

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=737

--- Comment #31 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
must sort MSR use get_state exactly as with PC and SVSTATE.

also TODO create a TestIssuerBase class

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