[Libre-soc-bugs] [Bug 517] Define JTAG pins and set up with litex for ulx3s85f
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Sun Apr 11 02:02:23 BST 2021
https://bugs.libre-soc.org/show_bug.cgi?id=517
--- Comment #119 from Cole Poirier <colepoirier at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #118)
> (In reply to Cole Poirier from comment #117)
>
> > Right, so given that the current state of the wiki is correct?
>
> why have you removed all mention of VREF? did you not understand
> your own words in comment #113?
>
> "VREF is an accurate, constant, low-noise output voltage, that is used as
> the reference for other electrical signals on a device."
>
> in comment #29 the table is correct. we established this back in october.
> you have had it explained to you multiple times that VREF is necessary.
>
> why when you have had it explained to you multiple times, and you actually
> looked it up for yourself only yesterday and got an explanation of what VREF
> is, all of which reinforce that VREF is necessary, would you then *remove*
> VREF from every single table?
Because you said to remove the VREF jumper cable, because VREF is supplied by
the FPGA, therefore there is not a pin connected for VREF, because it is
supplied by the FPGA?
I'm confused still.
--
You are receiving this mail because:
You are on the CC list for the bug.
More information about the libre-soc-bugs
mailing list