[Libre-soc-bugs] [Bug 517] Define JTAG pins and set up with litex for ulx3s85f

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=517

--- Comment #116 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Cole Poirier from comment #115)

> I see, this only works however if I actually have a proper understanding of
> electrical engineering, something not possible to do with out imminent
> deadline.

slapped wrist! we are all operating at the limit of our knowledge!  have
confidence that what you do not know can be determined and learned. 


> GND is still connected. 

good.

> You said vref is supplied by the fpga not the ft232r

yes.

> thus, you said to remove the vref jumper cable, and I did as you directed.

good.  this disconnects the power supplied *by* the FT232 onto the VCC pin,
doesn't it?

look at the PCB, it says 5V on one side, VCC in the middle, and 3.3V on the
other. removing the jumper disconnects *both* of those from VCC, doesn't it?

if there is no jumper connecting either of those voltages to VCC, then the
power supplied to VREF will not fight with the power supplied by the FPGA, will
it?

just as i explained very clearly to you on an hour long conversation eight
weeks ago, and your voice clearly indicated to me that you understood
everything that i explained.


> I'm confused.

yes, we know :)  this is why the page contains confusing statements.

> How many wires will be going from the ft232r cable to the fpga, what are
> they labelled, and what colour are they?

this is your task to complete.  i am focussing on the simulation.

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