[Libre-soc-bugs] [Bug 517] Define JTAG pins and set up with litex for ulx3s85f

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sat Apr 10 22:41:59 BST 2021


https://bugs.libre-soc.org/show_bug.cgi?id=517

--- Comment #115 from Cole Poirier <colepoirier at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #114)
>
> that would appear to be a logical thing to conclude.  however if you are not
> thinking for yourself, and i tell you the wrong thing, the object of the
> exercise - to double-check each other's work - is completely defeated, isn't
> it?

I see, this only works however if I actually have a proper understanding of
electrical engineering, something not possible to do with out imminent
deadline.

> excellent.  so if that VREF is disconnected as you ask in comment #98, the
> FT232 is in no way going to know what that reference is, is it?
> 
> and if GND is also disconnected, how would there ever be a circuit *at all*?
> if you put one wire into a plug, or only connect one terminal to a battery,
> it doesn't work, does it?

GND is still connected. You said vref is supplied by the fpga not the ft232r
thus, you said to remove the vref jumper cable, and I did as you directed.

I'm confused. Can you please just give me the answer that you already know so
we can proceed to the much more important and time critical task of testing
ls180 over jtag on the fpga? We can return to teaching me after the tapeout.

How many wires will be going from the ft232r cable to the fpga, what are they
labelled, and what colour are they?

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