[Libre-soc-bugs] [Bug 620] post-layout simulation needed using cocotb

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=620

--- Comment #10 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
ah ha! the error with wishbone jtag is that it is going through a converter (64
downto 32) which takes 2 cycles, and there is no "stall" signal.

consequently the stb line is dropped at the 1st of those cycles, in the middle
of the conversion, because the TAP WB FSM moves from READ to READACK too early.

i will try creating a "fake" stall to stop that hspoening.

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