[Libre-soc-bugs] [Bug 485] Create I-Cache from microwatt icache.vhdl

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=485

--- Comment #18 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Cole Poirier from comment #15)
> (In reply to Luke Kenneth Casson Leighton from comment #13)
> > (In reply to Cole Poirier from comment #7)
> > > doing just eq(0)
> > > you said, only sets the first bit to 0,
> > 
> > no i did not.  i said, "all nonspecified bits are set to zero i.e eq(0) is
> > zero-extended"
> 
> !! So eq(1) is only the first bit, but eq(0) is all the bits of the Signal?

eq(<Python int>) sets the bits to the sign-extended version if the int is
negative and to the zero-extended version otherwise. It always sets all bits of
the thing eq() is called on.

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