[Libre-soc-bugs] [Bug 485] Create I-Cache from microwatt icache.vhdl

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=485

--- Comment #15 from Cole Poirier <colepoirier at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #13)
> (In reply to Cole Poirier from comment #7)

> > I thought vhdl '(others => '0')' nmigen equivalent was ~1, 
> 
> no, it's "set all other bits to zero".  it says "0".
> 
> you meant (are confusing this with) "others => '1'

Correct.

> that asks for "all other bits to be set to 1."
> 
> and the way to do that is to set eq(-1) which is the same as eq(~0)

Gotcha.

> > doing just eq(0)
> > you said, only sets the first bit to 0,
> 
> no i did not.  i said, "all nonspecified bits are set to zero i.e eq(0) is
> zero-extended"

!! So eq(1) is only the first bit, but eq(0) is all the bits of the Signal?

> > where '(others => '0')' sets all
> > bits to zero.
> 
> yes.

Ok, glad I understood at least that correctly.

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