[Libre-soc-bugs] [Bug 507] ls180 asic needs an ioring, pads need defining and connecting

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=507

Luke Kenneth Casson Leighton <lkcl at lkcl.net> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Blocks|                            |199
    parent task for|                            |199
  budget allocation|                            |
    NLnet milestone|---                         |NLNet.2019.Coriolis2
         Depends on|                            |506


Referenced Bugs:

https://bugs.libre-soc.org/show_bug.cgi?id=199
[Bug 199] Layout using coriolis2 main core, 180nm
https://bugs.libre-soc.org/show_bug.cgi?id=506
[Bug 506] 8x VDD VSS pins needed in ioring
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