[Libre-soc-bugs] [Bug 488] Build test serdes on 180nm test chip for oct2020

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=488

--- Comment #8 from Staf Verhaegen <staf at fibraservi.eu> ---
We had a meeting with parties involved for the .18um libre-soc prototype
tape-out (see https://bugs.libre-soc.org/show_bug.cgi?id=138#c12)
Unfortunately we did not see a possibility to account for this request in the
already strict tape-out roadmap.
So we should see what is best way to proceed with this. Sky130 or maybe a new
.18um TSMC are possibilities. The former should be free if you are accepted on
the run, for the latter we need to find funding. As area of the prototype is
reduced part of that money way be repurposed but that need to be discussed with
NLNet.

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