[Libre-soc-bugs] [Bug 76] IEEE754 RISC-V "tininess" as well as rounding modes (odd/even) needed

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=76

Jacob Lifshay <programmerjake at gmail.com> changed:

           What    |Removed                     |Added
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