[Libre-soc-bugs] [Bug 240] POWER-RISCV ISA switch formal standard writeup needed

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Mon Sep 21 03:47:24 BST 2020


https://bugs.libre-soc.org/show_bug.cgi?id=240

Jacob Lifshay <programmerjake at gmail.com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
    parent task for|                            |174
  budget allocation|                            |

-- 
You are receiving this mail because:
You are on the CC list for the bug.


More information about the libre-soc-bugs mailing list