[Libre-soc-bugs] [Bug 469] Create D-cache from microwatt dcache.vhdl

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=469

--- Comment #21 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
                r1.forward_sel1 <= (others => '1');

that's not "just set the 1st bit to 1" it's "set *ALL* bits to 1".
whitequark informs us that the best way to do this is:

            sync += r1.forward_sel1.eq(~0) # all 1s

*definitely* not

            sync += r1.forward_sel1.eq(1) # sets only the LSB to 1.

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