[Libre-soc-bugs] [Bug 238] POWER Compressed Formal Standard writeup

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=238

--- Comment #116 from Alexandre Oliva <oliva at gnu.org> ---
great question.  I've heard about them, but I don't know where they fit in.  I
thought they would fit in yet another execution mode, so I was not concerned
about them.

some possibilities:

- 1 bit per insn, telling the encoding mode, not necessarily the length.  not
quite as useful for the monster muxer, but enough to enable the compact
mode-switching possibilities

- 2 bits of pre-length encoding for each insn, so the 4 (known to me?) lengths
can be represented

- use enough bits to cover equivalent lengths, even if not all bits cover
insns.  for 48-bit, we'd need 1 bit for 16-bit and one for 32-bit.  which one
comes first depends on the mode in which the 48-bit insn is encoded, but 48-bit
insns would consume two bits from the queue.  ditto for 64-bit insns, that
would encode 2 bits for 32-bit insns.  the muxer would have to peek at insns,
but maybe not quite as much as it would have to without the helper bits.

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