[Libre-soc-bugs] [Bug 238] POWER Compressed Formal Standard writeup

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Tue Nov 24 18:36:58 GMT 2020


--- Comment #83 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #77)
> While going through the PowerISA v3.1 spec, I noticed that we can't really
> use Primary Opcode 0 for compressed instructions, since Power reserves
> Primary Opcode 0 with Extended Opcode 256 to mean "Service Processor
> Attention", an instruction implemented by at least POWER8 and POWER9. This
> means that processors would have to read a 32-bit instruction to determine
> if the instruction was that instruction or not, so we can't redefine it to
> be a 16-bit instruction.

we can... by providing it as one of the 16-bit opcodes.  then when C mode
is activated the command is still available.

ahh this is the "attn" instruction.

> If we end up needing a whole primary opcode, we should use Primary Opcode 5
> instead, since it doesn't have any already-used encodings.

Compressed really does need to be at the very least on EXT000 because the
encoding of "illegal instruction" needs to be all-zeros.  it would be...
anomalous / concerning for a Compressed ISA to not have 0x0000 as "illegal".

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