[Libre-soc-bugs] [Bug 238] POWER Compressed Formal Standard writeup

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sun Nov 15 02:12:38 GMT 2020


https://bugs.libre-soc.org/show_bug.cgi?id=238

Jacob Lifshay <programmerjake at gmail.com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |programmerjake at gmail.com

--- Comment #2 from Jacob Lifshay <programmerjake at gmail.com> ---
one important note, in floating-point 0 - x does not give the same results as
-x

the values you get for 0 - 0 depend on the sign of the two inputs and on the
rounding mode.

So, I'd instead suggest combining fneg with fmr.


An additional idea, if we have to use an additional 16-bit instruction to enter
16-bit mode: it's common to have just 1 32-bit (or wider) instruction in a
sequence of 16-bit instructions, it might be a good idea to have a limited
subset of 16-bit instructions have additional info included to tell the
processor to exit 16-bit mode for just 1 instruction, then reenter 16-bit mode
without needing to use an enter-16-bit-mode instruction.

-- 
You are receiving this mail because:
You are on the CC list for the bug.


More information about the libre-soc-bugs mailing list