[Libre-soc-bugs] [Bug 155] a PLL is needed for the SoC

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=155

--- Comment #25 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Staf Verhaegen from comment #23)

> The bypass of the PLL will be done by only using the MUX and buffers of the
> standard cell library.

that should still be *inside* the PLL block, correct?  i.e. the *PLL block*
should use the standard cell library and should use a MUX and buffers, yes?

i.e. this should be done by Dmitri.

the LibreSOC core (and litex peripherals) will *only* take the one clock, and
the one clock shall be the PLL's output, correct?  LibreSOC's core (and
peripherals) shall *NOT* try to do the MUX, correct?

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