[Libre-soc-bugs] [Bug 199] Layout using coriolis2 main core, 180nm

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=199

--- Comment #10 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jean-Paul.Chaput from comment #9)
> (In reply to Luke Kenneth Casson Leighton from comment #8)
> 
> > i will run it later and see how it looks.  i am fascinated to see how far
> > it gets.
> 
>   Far. It's almost OK. I did it with only 5% of space margin and
>   without using METAL6. And, if you run in graphic mode, its 
>   fascinating how the placer seems to find back the blocks...
>   I add a picture in attachement.

missed :)

> > > A note about nMigen and a potential annoying bug at installation. nMigen
> > > is listed as a dependency so setup tools will try to install it.
> > > But if it is not installed *prior* to the Libre-SOC repositories, the
> > > m-lab version will be pulled from the Python archives.
> > 
> > yes.  this is normal because of the reliance on pip3 (via setuptools)
> > one solution: we remove all dependencies and expect people to install them 
> > manually (by way of a script / Makefile).
> 
>   I just wanted to hint at this potential problem so people don't
>   loose too much time next they encounter it. I slightly modified
>   the top Makefile so I can install in a non-system directory,

can you send me that so i can take a look?

btw i tried fpmul64 - experiment6 - and yosys is locked up solid 100% CPU
indefinitely in "clean".  which is particularly odd given that it worked
perfectly well last time i tried it.  which admittedly was with "flatten".

-- 
You are receiving this mail because:
You are on the CC list for the bug.