[Libre-soc-bugs] [Bug 396] create simulator PowerISA div/mod functions

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=396

--- Comment #2 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #1)
> Assuming this bug is for translating/binding functions to python to allow
> use as a reference for test cases and in other python code, correct me if
> I'm wrong.

yes, correct.  the only discrepancy: the test cases are actually a test
of an actual full cycle-accurate python-based simulator intended to be
compliant with POWER9.

that simulator is not intended to be "just a unit test".  it's being
developed as a full stand-alone simulator in its own right.

in that context it becomes clear that the simulator (top-level class
"ISACaller") needs to have a full compatible implementation *in its own right*
of the PowerISA DIV and MOD instructions.

it just so happens that this makes comparison against the RTL - by running
"parallel implementations" (one ISACaller, one nmigen) against each other
and cross-checking the results.

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