[Libre-soc-bugs] [Bug 324] create POWER9 DIV pipeline

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=324

--- Comment #22 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #18)
> I was thinking that the spec's / and % operators would always translate to
> trunc_div and trunc_rem unless they are the FP operators -- if all inputs
> are non-negative there is no difference between trunc_* and floor div/mod.
> 
> I don't think the hack with detecting if the variable name is `dividend` is
> necessary.

well... it's in now :)

> are there any other uses of the div and rem operators?

don't know: didn't want to take the risk - something to keep an eye on though.

$ python3 simulator/test_div_sim.py 

this now works.  i'm just adding a quick moduw test as well.  which also works.

remember to run pywriter.py after a git pull.

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