[Libre-soc-bugs] [Bug 558] gcc SV intrinsics concept

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=558

--- Comment #27 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Alexandre Oliva from comment #25)
> ok, good, set from register was one of the pieces that seemed to be missing
> to me.  

it's the fundamental core basis of Cray Vectorisation.  it is critically
important to understand this.

i recommend reading and re-reading the DAXPY example in the sigarch "SIMD
Considered Harmful" article again and again until it is clear.

setvl takes a register as the primary "wanted, total" number of "things" to be
processed.   10,000 DAXPY loops.  50,000 DAXPY loops.

the hardware says, "actually MAXVL is set to only 8.   so although you
requested 50,000 i am actually only going to set VL to 8".

a copy of that value of VL is also placed into RT.

the DAXPY operations get done: because VL=8 only 8 madds get done.

then the loop counter which was formerly 50,000, has RT subtracted from it.

it is now 49992.

not zero, so round the loop we go.

setvl receives a request to set VL equal to 49992.  it goes, "you requested
49992.  MAXVL is set to 8.  i can only give you 8.  therefore VL and RT will be
set to 8.  have a nice day"

etc etc until finally the loop gets down to e.g. 6 or 3 or 2

at which point, setvl says, "you requested i set VL equal to 2.  this is less
than 8.  you get what you asked for.  VL and RT are now 2.  have a nice day"

and finally, loop counter minus 2 equals zero, this zero is detected and the
loop is exited.

this is how Cray Vectors have worked since the 70s, and it is awesome.  massive
hardware could do 10,000 elements in one instruction.  you ask for VL=10,000
you damn well GOT 10000.  the hardware was however insane and needed special
off-chip multi-ported SRAMs *just for the register file*, gallium arsenide and
liquid gas cooling, it was mental.

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