[Libre-soc-bugs] [Bug 176] partitioned dynamic bool/all/any/xor operators
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Mon Dec 21 16:32:08 GMT 2020
https://bugs.libre-soc.org/show_bug.cgi?id=176
--- Comment #1 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
pranav wrote:
> I spent some time reading the code in the partitioned adder/ shift etc so clear about the "width".
excellent. it's basically a parameter which by default we set to 64 (with 7
partitions, every 8th bit) in real-world but the examples are all 32 bit (and
only 3 partitions to give 4x 8 bit)
this is because it's just... smaller examples.
> am still a little unsure of how to figure the "batches" and also the
> 4/8/16/32 in the implementation of simd, how and when to choose the same.
partitions first. basically, if we did not have partitions, then we would need
*separate* HDL for 1x64, separate HFL for 2x32, separate 4x16 and 8x8.
then a massive utterly awful switch statement literally in every single
pipeline, with a parameter "if mode == 1x64 do this else if 2x32 do that".
this is insane and flat-out unmaintainable code.
instead, the pipeline has a "partition context" as an extra input. these
partition points "break up" the 64 bit Signal into smaller, completely isolated
chunks, aka "batches".
it turns out that, just like Long Multiplication, you can *use* those "batches"
to create larger results.
so the first thing to do is to break the computation down into the smallest
"chunks". this is typically 8x8.
for the 8x8 SIMD case (where all the partition gates are CLOSED), this *is* the
answer!
now let us consider the 4x16 case. how do you create four 16-bit results when
you have performed 8x 8bit sub-results already?
well, the answer is very simple: you combine pairs of 8bit subresults to make
4x 16bit ones!
and if the 8bit subresults were, say, XOR of all 8 bits together, then, well,
to create the 16 bit results you um take pairs of the XOR intermediaries, and
simply XOR those together, too.
dead simple in principle.
i started describing it on this page, see boolean xor table
https://libre-soc.org/3d_gpu/architecture/dynamic_simd/logicops/
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