[Libre-soc-bugs] [Bug 526] create dry-run 180nm GDS-II files for IMEC

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=526

--- Comment #83 from Cole Poirier <colepoirier at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #82)
> (In reply to Cole Poirier from comment #80)
> > (In reply to Jean-Paul.Chaput from comment #79)
> > > Hello Luke,
> > > 
> > > I'm ready to perform tests on the full core, could you generate it and
> > > commit it? (il/json)
> > > 
> > > Regards,
> > 
> > Hi Luke,
> > 
> > If all this requires is using the command line switch when running issuer.py
> 
> issuer_verilog.py followed by copying to litex then make in the ls180 litex
> directory to merge the peripherals verilog and convert to ilang....

Will do. JP, I should have the ilang file for you in the next 15 minutes or so.

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