[Libre-soc-bugs] [Bug 471] bug in modsd DIV FSM

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=471

--- Comment #2 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
the pipeline calculates this one correctly, as does DivSIM:

check extra output. "DivPipeCore: modsd 17, 27, 0 'modsd 17, 27, 0\\n' [255, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
9223372036854775807, 0, 0, 0, 0]" 0 0

pia also gets it right:

>>> 0x7fffffffffffffff % 255
>>> 127

however this might also be a bug in microwatt (urrr)

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