[Libre-soc-bugs] [Bug 450] Create MMU from microwatt mmu.vhdl

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=450

--- Comment #59 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #51)
> also: wherever there is an eq into a full Signal (*not* a slice), and the
> last Cat is zeros, then because the default for an assignment *is* zeros if
> nothing is assigned, the last zeros can be REMOVED.
> 
> if that results in only one item in Cat, then Cat can go, too.

in that case the Cat will need to be converted to .as_unsigned() instead of
just being removed if the input Signal is signed -- don't want to accidentally
change the semantics :)

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