[Libre-soc-bugs] [Bug 448] MUL pipeline unit tests

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Wed Aug 5 20:28:31 BST 2020


https://bugs.libre-soc.org/show_bug.cgi?id=448

--- Comment #18 from Cole Poirier <colepoirier at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #17)
> (In reply to Cole Poirier from comment #16)
> 
> > Thanks for the clarification. I'm still far too afraid of introducing things
> > that break things, so when I get errors I cower ;-)
> 
> python unit test infrasttucture is specifically designed to be isolated.

Happy to be challenging myself again by engaging with you on the codebase, it's
a pleasant discomfort of learning new things :)

> > Also, I committed the initial test where it failed due to madd* insns
> > yesterday. So only a half failure there :)
> > 
> > Committed and pushed.
> 
> sorted.  git pull
> 
> diff --git a/src/soc/decoder/helpers.py b/src/soc/decoder/helpers.py
> index 17534800..870ec4ab 100644
> --- a/src/soc/decoder/helpers.py
> +++ b/src/soc/decoder/helpers.py
> @@ -4,6 +4,7 @@ from nmutil.divmod import trunc_divs, trunc_rems
>  from operator import floordiv, mod
>  from soc.decoder.selectable_int import selectltu as ltu
>  from soc.decoder.selectable_int import selectgtu as gtu
> +from soc.decoder.selectable_int import check_extsign
>  
>  trunc_div = floordiv
>  trunc_rem = mod
> @@ -37,6 +38,9 @@ def EXTS64(value):
>  
>  # signed version of MUL
>  def MULS(a, b):
> +    if isinstance(b, int):
> +        b = SelectableInt(b, self.bits)
> +    b = check_extsign(self, b)
>      a_s = a.value & (1 << (a.bits-1)) != 0
>      b_s = b.value & (1 << (b.bits-1)) != 0
>      result = abs(a) * abs(b)

Thanks Luke! What should I do next?

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