[libre-riscv-dev] additional ddr3 interfaces

[Staf Verhaegen]

Luke Kenneth Casson Leighton schreef op wo 01-04-2020 om 11:10 [+0000]:
> On Wed, Apr 1, 2020 at 1:44 AM Jacob Lifshay <programmerjake at gmail.com> wrote:
> > that would be nice, however the t2080 appears to have a 64-bit memoryinterface along with some really high-speed serdes -- both of which will bemore difficult to achieve.
> > However, if we get the funding required for the open-source custom DDR3interface, we could potentially put two copies on our SoC,
> 
> each DDR3/4 RAM interface adds around 0.4 watts per 800mhz clock ratewhich, due to power being a square law, ramps up 1.6 watts by 1600mhz.

Power consumption is linear with frequency and square with voltage (P = f * C * V^2).
For overclocking increasing frequency also likely means you need to increase voltage so you need to increase power consumption more than linear with frequency.

greets,
Staf.