[Libre-soc-isa] [Bug 1243] when loading index registers, have defined behavior for out of range indexes

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1243

Jacob Lifshay <programmerjake at gmail.com> changed:

           What    |Removed                     |Added
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                 CC|                            |programmerjake at gmail.com

--- Comment #1 from Jacob Lifshay <programmerjake at gmail.com> ---
an alternative idea is to have out-of-range indexes become -1, which is a
special marker that means register writes are ignored and register reads give
zero. this is relatively easy to do, all of RISC-V, AArch64, CDC 6600,
System/360, and more have a zero register that behaves basically the same, and
x86-64 OoO cpus often have a microarchitectural zero register.

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