[Libre-soc-isa] [Bug 968] document shift-and-add instruction

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=968

--- Comment #11 from Andrey Miroshnikov <andrey at technepisteme.xyz> ---
(In reply to Luke Kenneth Casson Leighton from comment #10)
> 64-bit on both operands, it makes no difference whatsoever.
Ah ok, although the operands are unsigned, the sign extension allows to do
address offsetting.

> 
> compare:
> 
>    ADD( RA, SIGNEXTEND( LOWERHALF(RB) )
> 
> with:
> 
>    ADD( RA, ZEROEXTEND( LOWERHALF(RB) )
> 
> then set RB=0x0000_0000_8000_0000 and compare the two.

Thanks, that info was missing from bitmanip.mdwn.

Where are these statements located?
grep'ing for those I didn't find anything in openpower-isa repo.

> in RFCs markdown pseudocode yes
> in markdown pseudocode used by ISACaller *no*.

Thanks for clearing that up.

> because it is more compact when doing address offsets.  takes up less
> space.  RA base 64 bit, offsets into data structure need only be 32bit.

Does that mean shadduw pseudocode is missing a EXTS() statement?
There is no explicit sign-extension in the pseudocode.

Adjusted based on your explanation:
https://git.libre-soc.org/?p=libreriscv.git;a=commitdiff;h=95a74ba3566333ac498bb1110781e563f86b4c06

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