[Libre-soc-isa] [Bug 585] New: add bounds-checked load/store instructions for WebAssembly

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Wed Jan 27 16:45:17 GMT 2021


            Bug ID: 585
           Summary: add bounds-checked load/store instructions for
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: Other
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Specification
          Assignee: programmerjake at gmail.com
          Reporter: programmerjake at gmail.com
                CC: libre-soc-isa at lists.libre-soc.org,
                    programmerjake at gmail.com
            Blocks: 584
   NLnet milestone: ---


We would just need semantics like the following:
address = compute-address-like-normal()
if instruction-has-32-bit-address: # separate instruction bit
    address &= 0xFFFFFFFF
if address + load_store_size >= wasm-limit-spr: # 64-bit addition
    trap, causing SIGSEGV
address += wasm-base-address-spr # always a 64-bit addition
normal-load-store(address, data)

the wasm-limit-spr is aligned to 2^16 in the WebAssembly spec.
the wasm-base-address-spr is aligned to at least 16 bytes, probably to a whole
4kB page.

Having a separate instruction of the above that just does the address
check/calculation and returns the computed address would also be handy for
things like calling memcpy or for atomics or other ops where we don't have
merged check-and-do-op instructions. For the separate calculate-wasm-address
instruction, load_store_size is either a register or an immediate, it is often
1, 2, 4, 8, or 16.

Referenced Bugs:

[Bug 584] Add instructions to accelerate WebAssembly which is being added to
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