[Libre-soc-isa] [Bug 569] svp64 register predicates vs BE arrays of bits

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Wed Jan 6 22:55:43 GMT 2021


https://bugs.libre-soc.org/show_bug.cgi?id=569

--- Comment #2 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Luke Kenneth Casson Leighton from comment #1)

> https://libre-soc.org/openpower/sv/cr_int_predication/

arrrg this is going to drive me nuts.

i need some urgent help verifying the section added to confirm that it is
correct.

this is the area which took 4 MONTHs to track down bugs and required 3 weeks of
investigation and help from Ben and Paul.

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