[Libre-soc-isa] [Bug 560] big-endian little-endian SV regfile layout idea

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Tue Jan 5 05:45:11 GMT 2021


--- Comment #75 from Alexandre Oliva <oliva at libre-soc.org> ---
I thought I'd already shown that I understand how ld and ldbrx work.  What else
remains so we can finish this exchange and get to my suggestion, that is not
related with this?

> a dynamic LE-BE regfile

My suggestion of iteration order in sub-register vector elements is unrelated
to this.

Should I file a separate bug for it so that you'll read it?

You are receiving this mail because:
You are on the CC list for the bug.

More information about the Libre-SOC-ISA mailing list