[Libre-soc-isa] [Bug 213] SimpleV Standard writeup needed

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Wed Nov 18 15:33:17 GMT 2020


--- Comment #96 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Luke Kenneth Casson Leighton from comment #95)

> there are two separate and distinct things needed here (both quite normally
> provided by swizzle)
> 1) the ability to select 1, 2, 3 or 4
>    parts of a vec4 to perform the
>    vector-computation on.  examples:

> 2) the ability to select any part of a vec4 to place it into any other
> position in a vec4.

neither of these things are possible to cover together with a lookup table of
less than 4+8 bits.  or 2+8 bits.

you can however say that if SUBVL=2 then if you have 16 available bits you can:

* use the 1st 4 for src1
* use the 2nd 4 for src2
* etc

and for vec3

* use the 1st 6 for src1
* use the next 6 for src2

finally for vec4 you have to compromise
because 2x 8 bits only allows you to cover src+dest, or src1+src2.

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