[Libre-soc-isa] [Bug 559] analyse implications of automatic detection of changing VL loop direction

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=559

--- Comment #3 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #1)
> changing direction won't make it act as a parallel vector op (write outputs
> only after fully reading all inputs) in all cases, since neither
> incrementing or decrementing indexes will work here:

yes, for 1-src 1-dest instructions it makes sense.

likewise for 2-src 1-dest where one source avoids overlap with both the other
src and also the dest.

but anything else is hosed.

question is: what to do in each case?

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