[Libre-soc-isa] [Bug 559] analyse implications of automatic detection of changing VL loop direction

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Wed Dec 30 03:38:34 GMT 2020


https://bugs.libre-soc.org/show_bug.cgi?id=559

Jacob Lifshay <programmerjake at gmail.com> changed:

           What    |Removed                     |Added
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                 CC|                            |programmerjake at gmail.com

--- Comment #1 from Jacob Lifshay <programmerjake at gmail.com> ---
changing direction won't make it act as a parallel vector op (write outputs
only after fully reading all inputs) in all cases, since neither incrementing
or decrementing indexes will work here:

vl = 8

add r8.v, r4.v, r12.v

incrementing version expands to:
add r8, r4, r12
add r9, r5, r13
add r10, r6, r14
add r11, r7, r15
add r12, r8, r16 // r8 reads wrong value
add r13, r9, r17
add r14, r10, r18
add r15, r11, r19

decrementing version:
add r15, r11, r19
add r14, r10, r18
add r13, r9, r17
add r12, r8, r16
add r11, r7, r15 // r15 reads wrong value
add r10, r6, r14
add r9, r5, r13
add r8, r4, r12

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