[Libre-soc-isa] [Bug 535] setvl/setvli encoding & future reg file expansion

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Tue Dec 1 17:23:10 GMT 2020


https://bugs.libre-soc.org/show_bug.cgi?id=535

--- Comment #6 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #5)
> I would expect that the final encoding efficiently support the 2 most common
> usecases:
> 1. set VL to a constant
> mvl = immed1
> vl = immed1
> 
> 2. set VL to a variable
> mvl = immed1
> vl = min(RA, mvl)
> RT = vl
> 
> We don't generally need the option to not set mvl or not set vl, since
> that's only relevant in very obscure usecases (can't think of any at the
> moment). 

setting VL but not MVL is needed to not disrupt a previously-set MVL

setting MVL but not VL is needed likewise to not disrupt (except by truncation
VL=min(VL, MVL)) a previously-set VL.

> I'm assuming you can just use a mfspr to read vl.

by wasting one extra instruction, by that instruction being a 100% unavoidable
mandatory part of absolutely all and any loops...

... yes.

[translation: not a good idea]

> Honestly, if vl
> can only be set using setvl[i], we can just get rid of mvl entirely, 

mvl defines the number of elements that the vector is to cover.

unlike in RVV it is not a hard architectural quantity.

it is therefore mandatory to have MVL be part of the setvli instruction,
otherwise how can SV know where to stop overwriting the regfile?

> mtspr could be entirely equivalent to `setvl 0, ra, 64` or just not
> supported (always traps no matter privilege mode) for writing VL.

no, use of mtspr is definitely not equivalent because that cuts out the setting
of RT.

the thing is that setvl/i is actually quite complex.  it took me several weeks
to understand it fully in RVV, and then even longer to realise and accept that
the capabilities of RVV setvl were needed (in full)... *and in addition* the
ability to set MVL at the same time was required.

the critical, critical part of setvl is this:

     RT = VL = min(min(VL, MAXVL), RA)

if all those calculations are not included then SV is severely penalised
because it requires, at the bare minimum, two to three mandatory *additional*
instructions (in an inner loop!) and at least one other as fixed overhead
(outside the loop) just to achieve the same effect.


suggestions to only use mtspr, mfspr, cut out mvl as an immediate are
absolutely guaranteed to destroy the value of SV as an efficient
instruction-compact Vectorisation system, or in the case of cutting out mvl
destroy it entirely.

setvl needs extremely careful study to properly understand.  it's best to start
from examples, such as the daxpy one at sigarch.  there are a few others
(strncpy) but the daxpy one is the easiest to start from

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