[Libre-soc-dev] change sv ld/st to allow non-zero immediates for unit-strided load/store

[Jacob Lifshay]

On Tue, Oct 11, 2022, 16:08 lkcl <luke.leighton at gmail.com> wrote:

>
>
> On Tuesday, October 11, 2022, Jacob Lifshay <programmerjake at gmail.com>
> wrote:
>
> > even if we just enable it only for RA=r1 rather than having a separate
> mode bit, it is that important.
>
> it's simply not possible.  take a look at the page pseudocode.
> non-uniform behaviour is where the problems start.
> RA=r1 becoming "special"


r1 is already special because it's the stack pointer, rendering strided
load/store with a base of r1 completely useless and wasted. see risc-v's c
extension (and arm's thumb) for examples of stack-pointer-specific
loads/stores.

will be hated universally by
> the compiler teams.


they will hate even more not having efficient spill/fill ops that don't
require a temporary address register (which causes even more problems for
register allocation because spills/fills are generated precisely when you
just ran out of registers, so needing *even more* registers for all the
address calculation isn't helpful).

Jacob