[Libre-soc-dev] CLEAR, Open Source FPGA

Sun Mar 27 18:56:02 BST 2022

On Saturday, March 26, 2022 09:48 CET, Luke Kenneth Casson Leighton <lkcl at lkcl.net> wrote: 

> ---
> crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
> 
> On Fri, Mar 25, 2022 at 8:41 PM <thierry.deval+libresoc at boyudev.be> wrote:
> >
> > Hi, Thierry Deval here,
> >
> > No expert in any domain, consider myself as an inquisitive power user.
> >
> > I've been following you for a while. Super exciting !
> > Am actually trying to follow the dev-env-setup scripts procedure in my sparse time.
> 
> hiya thierry, nice to see you around.  try this
> https://libre-soc.org/HDL_workflow/devscripts
> 
> should work unattended.
> 
> l.

Hi,

Well I tried it again, but I still have the same error with mkpinmux.sh at the end of the execution of hdl-dev-repos :
===========================================================================================================
./mkpinmux.sh
OrderedDict([('N', 32), ('E', 32), ('S', 32), ('W', 32)])
('pf', '', 'W', (['DQM0+', 'D0*', 'D1*', 'D2*', 'D3*', 'D4*', 'D5*', 'D6*', 'D7*', 'BA0+', 'BA1+', 'AD0+', 'AD1+', 'AD2+', 'AD3+', 'AD4+', 'AD5+', 'AD6+', 'AD7+', 'AD8+', 'AD9+', 'CLK+', 'CKE+', 'RASn+', 'CASn+', 'WEn+', 'CSn0+'], ['D0*', 'D1*', 'D2*', 'D3*', 'D4*', 'D5*', 'D6*', 'D7*'], 'CLK'))
('pingroup pre', 'SDR:', ['DQM0+', 'D0*', 'D1*', 'D2*', 'D3*', 'D4*', 'D5*', 'D6*', 'D7*', 'BA0+', 'BA1+', 'AD0+', 'AD1+', 'AD2+', 'AD3+', 'AD4+', 'AD5+', 'AD6+', 'AD7+', 'AD8+', 'AD9+', 'CLK+', 'CKE+', 'RASn+', 'CASn+', 'WEn+', 'CSn0+'])
('pingroup post', 'SDR:', ['AD9+', 'AD8+', 'AD7+', 'AD6+', 'AD5+', 'AD4+'])
('pf', 'E', 'W', (<spec.pinfunctions.RangePin object at 0x7f39c9c71690>, [], None))
('pingroup pre', 'VDD:E', <spec.pinfunctions.RangePin object at 0x7f39c9c71690>)
('pingroup post', 'VDD:E', ['0-'])
('pf', 'E', 'W', (<spec.pinfunctions.RangePin object at 0x7f39c9c71d90>, [], None))
('pingroup pre', 'VSS:E', <spec.pinfunctions.RangePin object at 0x7f39c9c71d90>)
('pingroup post', 'VSS:E', ['0-'])
('pf', 'I', 'W', (<spec.pinfunctions.RangePin object at 0x7f39c9c71690>, [], None))
...
...
...
Max number of IO: 108
Muxed IOs: 108
Dedicated IOs: 0
('muxed cells', [['6', 'vsse_6', ''], ['7', 'vdde_6', ''], ['8', 'vddi_6', ''], ['9', 'vssi_6', ''], ['22', 'vssi_7', ''], ['23', 'vddi_7', ''], ['24', 'vsse_7', ''], ['25', 'vdde_7', ''], ['27', 'sys_rst', ''], ['28', 'sys_pllclk', ''], ['29', 'sys_pllsela0', ''], ['30', 'sys_pllsela1', ''], ['31', 'sys_plltestout', ''], ['32', 'gpioe_e0', ''], ['33', 'gpioe_e1', ''], ['34', 'gpioe_e2', ''], ['35', 'gpioe_e3', ''], ['36', 'gpioe_e4', ''], ['37', 'gpioe_e5', ''], ['38', 'vsse_4', ''], ['39', 'vdde_4', ''], ['40', 'vddi_4', ''], ['41', 'vssi_4', ''], ['42', 'gpioe_e6', ''], ['43', 'gpioe_e7', ''], ['44', 'gpioe_e8', ''], ['45', 'jtag_tms', ''], ['46', 'jtag_tdi', ''], ['47', 'jtag_tdo', ''], ['48', 'jtag_tck', ''], ['49', 'gpioe_e9', ''], ['50', 'gpioe_e10', ''], ['51', 'gpioe_e11', ''], ['52', 'gpioe_e12', ''], ['53', 'gpioe_e13', ''], ['54', 'vssi_5', ''], ['55', 'vddi_5', ''], ['56', 'vsse_5', ''], ['57', 'vdde_5', ''], ['58', 'gpioe_e14', ''], ['59', 'gpioe_e15', ''], ['60', 'eint_0', ''], ['61', 'eint_1', ''], ['62', 'eint_2', ''], ['63', 'sys_pllvcout', ''], ['64', 'sdr_ad10', ''], ['65', 'sdr_ad11', ''], ['66', 'sdr_ad12', ''], ['67', 'sdr_dqm1', ''], ['68', 'vdde_2', ''], ['69', 'vsse_2', ''], ['70', 'vddi_2', ''], ['71', 'vssi_2', ''], ['72', 'sdr_d8', ''], ['73', 'sdr_d9', ''], ['74', 'sdr_d10', ''], ['75', 'sdr_d11', ''], ['76', 'sdr_d12', ''], ['77', 'sdr_d13', ''], ['78', 'sdr_d14', ''], ['79', 'sdr_d15', ''], ['80', 'sdr_clk', ''], ['81', 'sdr_cke', ''], ['82', 'sdr_rasn', ''], ['83', 'sdr_casn', ''], ['84', 'sdr_wen', ''], ['85', 'sdr_csn0', ''], ['86', 'vssi_3', ''], ['87', 'vddi_3', ''], ['88', 'vsse_3', ''], ['89', 'vdde_3', ''], ['90', 'uart0_tx', ''], ['91', 'uart0_rx', ''], ['92', 'mspi0_ck', ''], ['93', 'mspi0_nss', ''], ['94', 'mspi0_mosi', ''], ['95', 'mspi0_miso', ''], ['96', 'sdr_ad9', ''], ['97', 'sdr_ad8', ''], ['98', 'sdr_ad7', ''], ['99', 'sdr_ad6', ''], ['100', 'sdr_ad5', ''], ['101', 'sdr_ad4', ''], ['102', 'vdde_0', ''], ['103', 'vsse_0', ''], ['104', 'vddi_0', ''], ['105', 'vssi_0', ''], ['106', 'sdr_ad3', ''], ['107', 'sdr_ad2', ''], ['108', 'sdr_ad1', ''], ['109', 'sdr_ad0', ''], ['110', 'sdr_ba1', ''], ['111', 'sdr_ba0', ''], ['112', 'sdr_d7', ''], ['113', 'sdr_d6', ''], ['114', 'sdr_d5', ''], ['115', 'sdr_d4', ''], ['116', 'sdr_d3', ''], ['117', 'sdr_d2', ''], ['118', 'sdr_d1', ''], ['119', 'sdr_d0', ''], ['120', 'sdr_dqm0', ''], ['122', 'mtwi_sda', ''], ['123', 'mtwi_scl', ''], ['124', 'vssi_1', ''], ['125', 'vddi_1', ''], ['126', 'vsse_1', ''], ['127', 'vdde_1', '']])
('muxed cell banks', ['N', 'N', 'N', 'N', 'N', 'N', 'N', 'N', 'N', 'N', 'N', 'N', 'N', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'E', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'S', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W', 'W'])
('cell', ['6', 'vsse_6', ''], 'N')
('bank', 'N', 6, 'padname', 'vsse_6', 6, '')
Traceback (most recent call last):
  File "src/pinmux_generator.py", line 101, in <module>
    pm, chip = jsoncreate.pinparse(ps, pinspec)
  File "/home/thierry/src/soc/pinmux/src/jsoncreate.py", line 217, in pinparse
    padbank[banknum] = name
IndexError: list assignment index out of range
make: *** [Makefile:10: mkpinmux] Error 1

All Libre-SOC dev dependenices should now be installed.
===========================================================================================================

I don't think it could be related to these previous errors from the installation log, but I don't like these either :
===========================================================================================================
...
...
...
Using /usr/local/lib/python3.7/dist-packages/typing_extensions-4.1.1-py3.7.egg
Searching for MarkupSafe==1.1.0
Best match: MarkupSafe 1.1.0
Adding MarkupSafe 1.1.0 to easy-install.pth file

Using /usr/lib/python3/dist-packages
Finished processing dependencies for libresoc-openpower-isa==0.0.3
sv_analysis
Traceback (most recent call last):
  File "/usr/local/bin/sv_analysis", line 11, in <module>
    load_entry_point('libresoc-openpower-isa', 'console_scripts', 'sv_analysis')()
  File "/usr/lib/python3/dist-packages/pkg_resources/__init__.py", line 489, in load_entry_point
    return get_distribution(dist).load_entry_point(group, name)
  File "/usr/lib/python3/dist-packages/pkg_resources/__init__.py", line 2793, in load_entry_point
    return ep.load()
  File "/usr/lib/python3/dist-packages/pkg_resources/__init__.py", line 2411, in load
    return self.resolve()
  File "/usr/lib/python3/dist-packages/pkg_resources/__init__.py", line 2417, in resolve
    module = __import__(self.module_name, fromlist=['__name__'], level=0)
  File "/home/thierry/src/openpower-isa/src/openpower/sv/sv_analysis.py", line 23, in <module>
    from openpower.decoder.power_svp64 import SVP64RM
  File "/home/thierry/src/openpower-isa/src/openpower/decoder/power_svp64.py", line 6, in <module>
    from openpower.util import log
ImportError: cannot import name 'log' from 'openpower.util' (/home/thierry/src/openpower-isa/src/openpower/util/__init__.py)
make: *** [Makefile:12: svanalysis] Error 1
pywriter
Traceback (most recent call last):
  File "/usr/local/bin/pywriter", line 11, in <module>
    load_entry_point('libresoc-openpower-isa', 'console_scripts', 'pywriter')()
  File "/usr/lib/python3/dist-packages/pkg_resources/__init__.py", line 489, in load_entry_point
    return get_distribution(dist).load_entry_point(group, name)
  File "/usr/lib/python3/dist-packages/pkg_resources/__init__.py", line 2793, in load_entry_point
    return ep.load()
  File "/usr/lib/python3/dist-packages/pkg_resources/__init__.py", line 2411, in load
    return self.resolve()
  File "/usr/lib/python3/dist-packages/pkg_resources/__init__.py", line 2417, in resolve
    module = __import__(self.module_name, fromlist=['__name__'], level=0)
  File "/home/thierry/src/openpower-isa/src/openpower/decoder/pseudo/pywriter.py", line 8, in <module>
    from openpower.decoder.power_pseudo import convert_to_python
  File "/home/thierry/src/openpower-isa/src/openpower/decoder/power_pseudo.py", line 18, in <module>
    from openpower.decoder.power_decoder import create_pdecode
  File "/home/thierry/src/openpower-isa/src/openpower/decoder/power_decoder.py", line 103, in <module>
    from openpower.decoder.power_svp64 import SVP64RM
  File "/home/thierry/src/openpower-isa/src/openpower/decoder/power_svp64.py", line 6, in <module>
    from openpower.util import log
ImportError: cannot import name 'log' from 'openpower.util' (/home/thierry/src/openpower-isa/src/openpower/util/__init__.py)
make: *** [Makefile:16: pywriter] Error 1
pyfnwriter
Traceback (most recent call last):
  File "/usr/local/bin/pyfnwriter", line 11, in <module>
    load_entry_point('libresoc-openpower-isa', 'console_scripts', 'pyfnwriter')()
  File "/usr/lib/python3/dist-packages/pkg_resources/__init__.py", line 489, in load_entry_point
    return get_distribution(dist).load_entry_point(group, name)
  File "/usr/lib/python3/dist-packages/pkg_resources/__init__.py", line 2793, in load_entry_point
    return ep.load()
  File "/usr/lib/python3/dist-packages/pkg_resources/__init__.py", line 2411, in load
    return self.resolve()
  File "/usr/lib/python3/dist-packages/pkg_resources/__init__.py", line 2417, in resolve
    module = __import__(self.module_name, fromlist=['__name__'], level=0)
  File "/home/thierry/src/openpower-isa/src/openpower/decoder/pseudo/pyfnwriter.py", line 8, in <module>
    from openpower.decoder.power_pseudo import convert_to_pure_python
  File "/home/thierry/src/openpower-isa/src/openpower/decoder/power_pseudo.py", line 18, in <module>
    from openpower.decoder.power_decoder import create_pdecode
  File "/home/thierry/src/openpower-isa/src/openpower/decoder/power_decoder.py", line 103, in <module>
    from openpower.decoder.power_svp64 import SVP64RM
  File "/home/thierry/src/openpower-isa/src/openpower/decoder/power_svp64.py", line 6, in <module>
    from openpower.util import log
ImportError: cannot import name 'log' from 'openpower.util' (/home/thierry/src/openpower-isa/src/openpower/util/__init__.py)
make: *** [Makefile:20: pyfnwriter] Error 1
Submodule 'berkeley-softfloat-3' (https://github.com/ucb-bar/berkeley-softfloat-3) registered for path 'berkeley-softfloat-3'
Submodule 'berkeley-testfloat-3' (https://github.com/ucb-bar/berkeley-testfloat-3) registered for path 'berkeley-testfloat-3'
Cloning into '/home/thierry/src/ieee754fpu/berkeley-softfloat-3'...
...
...
...
===========================================================================================================

I'm running the scripts on Librem14 i7-10710U, 64GiB RAM and a fresh Debian 11 Bullseye install.
Using the libresoc schroot.

At least with the https://libre-soc.org/HDL_workflow/coriolis2/ setup with ./coriolis2-chroot proposed by Andrey, it went to the end, to the chip floorplan in cgt.  ;-)

Keeping trying...

Thierry