[Libre-soc-dev] CLEAR, Open Source FPGA

[Jacob Lifshay]

On Fri, Mar 25, 2022, 13:07 Andrey Miroshnikov <andrey at technepisteme.xyz>
wrote:

> On 25/03/2022 19:39, Tobias Platen wrote:
> > On Fri, 2022-03-25 at 19:10 +0000, lkcl wrote:
> >>
> https://groupgets.com/campaigns/1003-clear-the-open-source-fpga-asic-by-chipignite
> >>
>
> At least having partial support for this board is probably a good idea.
>

I agree, except that there's no way libre-soc or even most tiny risc-v
cores will fit -- afaict the fpga has only 64 luts. you might be able to
cram a bit-serial rv32e core in there if your lucky and you use external
ram or something for the cpu registers.

Jacob

>