[Libre-soc-dev] effect of more decode pipe stages on hardware requirements for execution resources for OoO processors

Jacob Lifshay programmerjake at gmail.com
Wed Feb 16 18:20:33 GMT 2022

On Wed, Feb 16, 2022, 10:08 lkcl <luke.leighton at gmail.com> wrote:

> where i think you might be right is if the decode phase is say 9 long
> and the register information for determining Hazards is only available
> at the 9th (last) phase.  at that point, the decode-FIFO is
> effectively completely decoupled from issue *and* hazard-reservation
> *and* RS reservation and there is nothing that can be done about that.

yup, that's exactly my point, that adding more fetch/decode stages before
allocating RSes doesn't require more RSes or other execution resources if
you ignore branch prediction.


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