[Libre-soc-dev] effect of more decode pipe stages on hardware requirements for execution resources for OoO processors
programmerjake at gmail.com
Wed Feb 16 02:44:34 GMT 2022
On Tue, Feb 15, 2022, 18:34 lkcl <luke.leighton at gmail.com> wrote:
> On February 16, 2022 2:10:28 AM UTC, Jacob Lifshay <
> programmerjake at gmail.com> wrote:
> >the limit comes from the ldu writing the address register then the next
> >loop's ldu reading it,
> assume there is no such link or that operand forwarding exists to solve it.
that's kinda unreasonable -- every cpu in existence has to respect RAW
dependencies cuz that's how instructions transfer data to other
instructions through registers.
> stop putting barriers in place in order to concentrate on the core of the
> problem being analysed.
i'd have to change what openpower machine code program is being run, which
requires recompiling power-cpu-sim (I never got around to reading that as
an input, i just hard-coded it as a constant).
that said, essentially every useful 4-instruction loop will have this
problem because it's intrinsic to the concept of having loop counters that
are incremented each iteration, unless we build a cpu that can do loop
unrolling on-the-fly (definitely well beyond what a OoO cpu normally does).
More information about the Libre-soc-dev