[Libre-soc-dev] progress on Arty A7-100t using symbiflow to compile microwatt and libre-soc

Luke Kenneth Casson Leighton lkcl at lkcl.net
Wed Feb 9 01:46:00 GMT 2022

On Tue, Feb 8, 2022 at 4:27 PM Luke Kenneth Casson Leighton
<lkcl at lkcl.net> wrote:

> * microwatt successfully shows up to the CRC and then hangs.
>   this is at 50 mhz.  i am currently running a rebuild at 25mhz
>   to see if that helps.

good news, i have a 25 mhz microwatt symbiflow boot. this is
of course nowhere near 48-55 mhz needed to initialise the DDR3
DRAM IC, but at least execution of something - anything at all - is

Libre-SOC on the other hand is not executing even at 10 mhz,
despite (i reiterate) it working perfectly on a VERSA_ECP5
and ULX3S at 55 mhz using nextpnr-ecp5 (exact same HDL)

my feeling is that vtr is just being pushed too hard and can't
cope with larger designs that utilise a significant porportion
of the FPGA.  whereas for whatever reason, nextpnr can:
that 55mhz boot was successful on the 45k ECP5 with a
stunning 95% ultilsation. frankly i'm astonished and amazed
it worked, it's quite an achievement.


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