[Libre-soc-dev] SVP64 Vectorised add-carry => big int add
luke.leighton at gmail.com
Wed Apr 13 05:36:02 BST 2022
On April 13, 2022 4:25:17 AM UTC, Jacob Lifshay <programmerjake at gmail.com> wrote:
>I'm assuming 64-bit mul is implemented using a pipelined 64x64->128-bit
>multiplier, since that is the general assumption on fast cpus.
SVP64 designed for all hw types. imagine GPU style w/ 1024 or 4096 cores, 64 bit mul ALU completely inappropriate, 32 bit w/FSM ok, saves gates. specialised workloads.
ISA designers must think these things through! annoyingly. patience.
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