[Libre-soc-dev] SVP64 Vectorised add-carry => big int add
programmerjake at gmail.com
Tue Apr 12 04:15:43 BST 2022
On Sun, Apr 10, 2022, 08:37 lkcl <luke.leighton at gmail.com> wrote:
> could someone please check the new section about CA/CA32, am i right and
> is it clear that a chain of adde's (sv.adde) would in fact be a "Big
> Integer Add"?
yes, that's correct.
> and if so, is it reasonable to optimise at the backend with some parallel
> lookahead carry?
yes. we'd probably also want to optimize subfe too. we could have the
>64-bit carry take 2 cycles instead of 1 so there's time to propagate
through the look-ahead circuits.
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